Design of asynchronous microprocessor for power proportionality

PhD ThesisMicroprocessors continue to get exponentially cheaper for end users following Moore’s law, while the costs involved in their design keep growing, also at an exponential rate. The reason is the ever increasing complexity of processors, which modern EDA tools struggle to keep up with. This makes further scaling for performance subject to a high risk in the reliability of the system. To keep this risk low, yet improve the performance, CPU designers try to optimise various parts of the processor. Instruction Set Architecture (ISA) is a significant part of the whole processor design flow, whose optimal design for a particular combination of available hardware resources and software requirements is crucial for building processors with high performance and efficient energy utilisation. This is a challenging task involving a lot of heuristics and high-level design decisions. Another issue impacting CPU reliability is continuous scaling for power consumption. For the last decades CPU designers have been mainly focused on improving performance, but “keeping energy and power consumption in mind”. The consequence of this was a development of energy-efficient systems, where energy was considered as a resource whose consumption should be optimised. As CMOS technology was progressing, with feature size decreasing and power delivered to circuit components becoming less stable, the energy resource turned from an optimisation criterion into a constraint, sometimes a critical one. At this point power proportionality becomes one of the most important aspects in system design. Developing methods and techniques which will address the problem of designing a power-proportional microprocessor, capable to adapt to varying operating conditions (such as low or even unstable voltage levels) and application requirements in the runtime, is one of today’s grand challenges. In this thesis this challenge is addressed by proposing a new design flow for the development of an ISA for microprocessors, which can be altered to suit a particular hardware platform or a specific operating mode. This flow uses an expressive and powerful formalism for the specification of processor instruction sets called the Conditional Partial Order Graph (CPOG). The CPOG model captures large sets of behavioural scenarios for a microarchitectural level in a computationally efficient form amenable to formal transformations for synthesis, verification and automated derivation of asynchronous hardware for the CPU microcontrol. The feasibility of the methodology, novel design flow and a number of optimisation techniques was proven in a full size asynchronous Intel 8051 microprocessor and its demonstrator silicon. The chip showed the ability to work in a wide range of operating voltage and environmental conditions. Depending on application requirements and power budget our ASIC supports several operating modes: one optimised for energy consumption and the other one for performance. This was achieved by extending a traditional datapath structure with an auxiliary control layer for adaptable and fault tolerant operation. These and other optimisations resulted in a reconfigurable and adaptable implementation, which was proven by measurements, analysis and evaluation of the chip.EPSR

Analysis of Signal Processing Methods to Reject the DC Offset Contribution of Static Reflectors in FMCW Radar-Based Vital Signs Monitoring

Frequency-modulated continuous wave (FMCW) radars are currently being investigated for remote vital signs monitoring (measure of respiration and heart rates) as an innovative wireless solution for healthcare and ambient assisted living. However, static reflectors (furniture, objects, stationary body parts, etc.) within the range or range angular bin where the subject is present contribute in the Doppler signal to a direct current (DC) offset. The latter is added to the person’s information, containing also a useful DC component, causing signal distortion and hence reducing the accuracy in measuring the vital sign parameters. Removing the sole contribution of the unwanted DC offset is fundamental to perform proper phase demodulation, so that accurate vital signs monitoring can be achieved. In this work, we analyzed different DC offset calibration methods to determine which one achieves the highest accuracy in measuring the physiological parameters as the transmitting frequency varies. More precisely, by using two FMCW radars, operating below 10 GHz and at millimeter wave (mmWave), we applied four DC offset calibration methods to the baseband radar signals originated by the cardiopulmonary activities. We experimentally determined the accuracy of the methods by measuring the respiration and the heart rates of different subjects in an office setting. It was found that the linear demodulation outperforms the other methods if operating below 10 GHz while the geometric fitting provides the best results at mmWave

Radar fusion for multipath mitigation in indoor environments

One of the main challenges of radar-based localization applications in indoor environments is the presence of strong multipath. When the radar bandwidth is large enough, multipath components can be resolved in range but they result in unwanted ghost targets. We propose a novel multipath mitigation approach that exploits the fact that multipaths are highly dependent on the scene geometry. The multipath mitigation approach discards the ghost targets based on the fused information of multiple radars located at different positions in the scene. For such radar fusion, the output of the radar signal processing chain is translated into the world coordinate system that is common for all the radars. We propose a radar alignment approach to estimate the translation and rotation parameters from radar to world coordinate system and vice versa. Our multipath mitigation method is combined with an unscented Kalman filter to improve the localization accuracy. We demonstrate the effectiveness of our complete approach with a real experiment using two radars to detect and track a target in a room with severe multipath.info:eu-repo/semantics/publishe

Programmable Systems for Intelligence in Automobiles (PRYSTINE): Final results after Year 3

Autonomous driving is disrupting the automotive industry as we know it today. For this, fail-operational behavior is essential in the sense, plan, and act stages of the automation chain in order to handle safety-critical situations on its own, which currently is not reached with state-of-the-art approaches.The European ECSEL research project PRYSTINE realizes Fail-operational Urban Surround perceptION (FUSION) based on robust Radar and LiDAR sensor fusion and control functions in order to enable safe automated driving in urban and rural environments. This paper showcases some of the key exploitable results (e.g., novel Radar sensors, innovative embedded control and E/E architectures, pioneering sensor fusion approaches, AI-controlled vehicle demonstrators) achieved until its final year 3